BUS +/- Signals Open Or No Response From Seat Module

Possible Causes are:

• ATTEMPT TO COMMUNICATE WITH THE BCM
• FUSED B (+) CIRCUIT OPEN
• GROUND CIRCUIT OPEN
• OPEN PCI BUS CIRCUIT
• SEAT MODULE

1. Turn ignition on. Using the DRBIII(R), enter Body then Body Computer. Was the DRBIII(R) able to I/D or communicate with the BCM? If yes, go to next step. If no, diagnose using appropriate procedure. See COMMUNICATION  under DIAGNOSTIC TESTS. Perform MEMORY SYSTEM VERIFICATION TEST  under VERIFICATION TESTS.
2. Turn ignition off. Disconnect the Seat Module C2 harness connector. Using a 12-volt test light connected to ground, probe both Fused B+ circuits. Is the test light illuminated for both circuits? If yes, go to next step. If no, repair the Fused B+ circuit for an open. Perform MEMORY SYSTEM VERIFICATION TEST  under VERIFICATION TESTS.
3. Turn ignition off. Disconnect the Seat Module harness connectors. Using a 12-volt test light connected to 12 volts, probe each ground circuit. Is the test light illuminated for each circuit? If yes, go to next step. If no, repair the ground circuit for an open. Perform MEMORY SYSTEM VERIFICATION TEST  under VERIFICATION TESTS.
4. Turn ignition off. Disconnect the Seat Module C1 harness connector. Use Scope Input Cable (CH7058), Cable To Probe Adapter (CH7062), and the Red and Black test probes. Connect the scope input cable to the channel one connector on the DRBIII(R). Attach the Red and Black leads and the cable to probe adapter to the scope input cable. Using the DRBIII(R), select Pep Module Tools. Select lab scope. Select Live Data. Select 12-volt square wave. Press F2 for Scope. Press F2 and use the down arrow to set voltage range to 20 volts. Press F2 again, when complete. Connect the Black lead to the chassis ground. Connect the Red lead to the PCI Bus circuit in the Seat Module C1 connector. Turn ignition on. Observe the voltage display on the DRBIII(R) Lab Scope. Does the voltage pulse from 0 to approximately 7.5 volts? If yes, replace the Seat Module. Perform MEMORY SYSTEM VERIFICATION TEST  under VERIFICATION TESTS. If no, repair the PCI Bus circuit for an open. Perform MEMORY SYSTEM VERIFICATION TEST  under VERIFICATION TESTS.