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PSM Logic Functions, Logic Block Function - GF54.21-D-3210TSB

Model 447, 448 

with code ED5 (Parameterisable special module) 

with code XM7 (MOPF II) 

Model 907, 910 

with code ED5 (Parameterisable special module) 

with code XJ4 (Modification year G4-I) 

G16501236Courtesy of MERCEDES-BENZ USA

Logic block, function 

A logic block has 4 digital inputs (E1 , E2 , E3 , E4 ) and 2 digital outputs (AA , AB ). The 2nd output (AB ) is always the inversion of the 1st output (AA ). A codable filter is connected upstream of each input (E1 , E2 , E3 , E4 ).

In one logic block, 3 2-input gates are configured according to the illustration above. These 2-input gates can perform various logic functions independently of one another. By these means, it is possible to effectively realize logic operations which for the most part consist of 2-input gates, without having to use a complete logic block each time. At the same time, there is also the option to simulate 3-input and 4-input gates with just one logic block. This procedure saves resources and shortens the throughput time of the system of the programmable logic controller (PLC) because the number of sequential logic blocks can be reduced.

One byte is made available for each logic block for determining the logic function in block X (X), block Y (Y) and block Z (Z). It has the following structure:

Coding of logic block 

G16501237Courtesy of MERCEDES-BENZ USA

The "NAND" and "EXNOR" functions are made available by the 2nd inverted output (AB ) of the logic system. Therefore, 2 bits suffice for coding for block Z (Z).

IMPORTANT Signal identification number = Signal ID.

CODING VIA DATA ENTRY TABLE

Designation in data entry table Data entry bit width Data bit evaluation Meaning
B1_G1_LB1_Unterblock_X [...sub-block_X] 3 bit - Codable block X (X)
B1_G1_LB1_Unterblock_Y [...sub-block_Y] 3 bit - Codable block Y (Y)
B1_G1_LB1_Unterblock_Z [...sub-block_Z] 2 bit - Codable block Z (Z)
B1_G1_LB1_1_Signal_ID 32 bit 1 bit Filter + input signal data entry signal ID for input (E1 )
B1_G1_LB1_2_Signal_ID 32 bit 1 bit Filter + input signal data entry signal ID for input (E2 )
B1_G1_LB1_3_Signal_ID 32 bit 1 bit Filter + input signal data entry signal ID for input (E3 )
B1_G1_LB1_4_Signal_ID 32 bit 1 bit Filter + input signal data entry signal ID for input (E4 )
SIGNAL ID OF OUTPUTS (AA, AB)

Designation in signal ID list Data bit width Meaning
SPS_G1_LB1 1 bit Signal ID of output (AA )
SPS_G1_LB1_inv 1 bit Signal ID of inverted output (AB )

The same applies for the other logic blocks under observation of the naming conventions:

  Overview of system components for parameterizable special module (PSM)   GF54.21-D-9998TSB